Trio Service Manual Rev G July 2010

Table of Contents

Foreword ... iii Warnings, Precautions And Notes ... iii Warning... iii

Theory of Operation ... 1 - 1 Introduction ... 1 - 1 Hardware Overview ... 1 - 3 Power Supply Board (Lead Acid Battery) ... 1 - 3 Power Supply Board (Lithium Ion Battery)... 1 - 5 CPU Board (Main Control Board) ... 1 - 6 Keypad Board... 1 - 9 Keypad Board... 1 - 10 Keypad Board... 1 - 11 TR60-C Recorder ... 1 - 12 Serial Interface Converter Board ... 1 - 14 Parameter Circuit Descriptions ... 1 - 15 ECG ... 1 - 15 Respiration ... 1 - 15 NIBP ... 1 - 16 SpO2 ... 1 - 16 Temperature... 1 - 17 IBP (optional) ... 1 - 17

Calibration/Maintenance ... 2 - 1 Calibration Introduction ... 2 - 1 Warnings and Guidelines ... 2 - 1 Test Equipment and Special Tools Required... 2 - 1 Calibration and System Checks ... 2 - 2 Device Appearance and Installation Checks... 2 - 2 Maintenance Menu... 2 - 2 Safety Tests... 2 - 11 Testing Each Parameter... 2 - 12 ECG and RESP ... 2 - 12 NIBP ... 2 - 12 SpO2 ... 2 - 13 TEMP ... 2 - 14 IBP... 2 - 14

Parts ... 3 - 1 Exploded Views of the Trio Monitor... 3 - 1 Parts Listing ... 3 - 12

Repair Information ... 4 - 1 Introduction ... 4 - 1 Single Temp Cable Assembly ... 4 - 10 ECG Cable Assembly... 4 - 10 Troubleshooting ... 4 - 11 Module-level Troubleshooting ... 4 - 11 Disassembly Instructions... 4 - 14 Tools Needed ... 4 - 14 Removal of the Front Housing... 4 - 14 Removal of Display ... 4 - 14 Removal of Thermal Printhead Recorder... 4 - 14 Removal of PCB Chassis Assembly... 4 - 15 Removal of Display Mounting Plate ... 4 - 15 Replacement of 3V Lithium Cell Battery... 4 - 15

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Table of Contents

Removal of Power Supply Assembly ... 4 - 15 Removal of PCB Chassis Rear Panel Plate ... 4 - 15 Removal of NIBP/IBP PCB Mounting Plate ... 4 - 16 Removal of Handle ... 4 - 16 ECG Cable ESIS and Non ESIS ... 4 - 17 ECG Shielded Lead Wires ... 4 - 18 Trio Wall Mounts and Rolling Stand ... 4 - 20

Appendix ... 5 - 1 System Alarm Prompts ... 5 - 1

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Trio™ Service Manual

Foreword

Introduction

Foreword This service manual gives a detailed description of the Trio Portable Patient Monitor, including, circuit descriptions, test procedures and a spare part listing. This manual is intended as a guide for technically qualified personnel during repair, testing or calibration procedures.

Warnings, Precautions And Notes Please read and adhere to all warnings, precautions and notes listed here and in the appropriate areas throughout this manual. A WARNING is provided to alert the user to potential serious outcomes (death, injury, or serious adverse events) to the patient or the user. A CAUTION is provided to alert the user to use special care necessary for the safe and effective use of the device. They may include actions to be taken to avoid effects on patients or users that may not be potentially life threatening or result in serious injury, but about which the user should be aware. Cautions are also provided to alert the user to adverse effects on this device of use or misuse and the care necessary to avoid such effects. A NOTE is provided when additional general information is applicable.

Warning WARNING: The NIBP pneumatic test (specified in the EN 1060-1 standard) is used to determine if there are air leaks in the NIBP airway. If the system displays the prompt that the NIBP airway has air leaks, please contact the manufacturer for repair. CAUTION:

Trio™ Service Manual

To ensure continued use of the Factory Defaults when the unit is powered off and on, save the Factory Defaults as the User Default Configuration after reassembly.

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Introduction

Warning

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1.0

Theory of Operation

1.1

Introduction The Trio portable patient monitor uses a parameter module as the basis for acquiring patient data. The results are transmitted to the main control board to process and display the data and waveforms. CPU board commands and status messages of modules are transmitted via databus. The structure of the entire system is shown in the figure below. Medical Staff

Keyboard

Display

Recorder

Power

Main control board

Network interface (future)

ECG/RESP/TEMP

SpO2

NIBP

IBP

Patient

FIGURE 1-1 System Structure Diagram

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Introduction

Theory of Operation

As shown in the above figure, the four parameter modules execute real-time monitoring of NIBP, SpO2, ECG/RESP/TEMP and IBP through the use of blood pressure cuffs and patient cables. The patient data is transmitted to the CPU board for display. When required, data may be printed out via the recorder.

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Theory of Operation

1.2

Hardware Overview

Hardware Overview TFT Display 834 inchs 800 X 600

FAN

J2

X15

X14

J6

J9

Power Supply PCB J3

P10

P2 (CRT) J5

P3 (FOR 9000 P12 VGA)

J4

P11

X16

J2

J7

Key & Alarm P .C.B. J8

P7(BDM )

Speaker

Host P .C.B.

X 1

P13

Recorder Module X 2

P17 (FOR 509C) TO X4

Battery

Serial interface

Alarm LED

P5

P1 A4(TFT_DIGTAL)

Main Power Input

Serial Coverter J1 P.C.B

P15 P16 P6

VGA interface

NET Interface

P14

P8 From J2

X4

X 3

Recorder P.S.

X5

X6

X7

X8

ECG/RES P/TEMP P.C.B.

SPO2

NIBP Module

IBP P.C .B.

X9

X10

X11

X12

SpO2 Sensor

Cuff

IBP

SPO2

TEMP ECG Sensor Cable

NIBP

EC G

TEMP

Analog output

P9

IBP Cable

FIGURE 1-2 Connection Diagram

1.2.1

Power Supply Board (Lead Acid Battery) P/N 0671-00-0235 Trio power supply board specifications: • AC input voltage:100~250 VAC • AC input current: <1.6 A • AC voltage frequency: 50/60 HZ • Two-way output voltage: 5 V/12 V, normal working current is 1.5 A for 5 V, 2 A for 12 V • Two-way output voltage has functions of short-circuit, over-current and over-voltage protection • The power board has reset function • The power board can manage the charging process of lead-acid battery (12 V/ 2.3 AH). The charging time is 8 hours maximum. NOTE:

Trio™ Service Manual

Power Supply Board must be connected to resistive load to operate properly and avoid damage due to an overcurrent condition.

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Hardware Overview

Theory of Operation

5VDC-DC converter

AC input

Voltage test

AC/DC REC POWER SOURCE

Battery and Charging Management Circuit

Power on/off control circuit

12V output

FIGURE 1-3 Block diagram of Trio power supply board Key Test Points

1-4

NO.

NAME

LOCATION

FUNCTION

1

Rectified voltage

C12

Primary rectified voltage, range: 107~354 V

2

RTN1

C12 negative electrode

Primary ground

3

Driving waveform

Q1.1

There is a driving waveform of about 100 KHZ between Q1.1 and the negative electrode of C12

4

VIN

C19 positive electrode

17.5 V provide input voltage for DC-DC

5

GND

C19 negative electrode

Secondary ground

6

5B

C47 positive electrode

5 V spare output, provide power for on/off circuit

7

5V

ZD3 cathode

5 V output, voltage range is 4.75~5.25 V

8

12 V

ZD3 cathode

12 V output, voltage range is 11.0~13.0 V

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Theory of Operation

1.2.2

Hardware Overview

Power Supply Board (Lithium Ion Battery) P/N 0671 -00-0051 Trio Power Supply board specifications: • AC input voltage:110~240VAC+10% • AC input current: <1.6A • AC voltage frequency: 50/60+3HZ • Two-way output voltage: 5V/12V, normal working current is 1.3A for 5V, 1.3A for 12V. • Two-way output voltage has functions of short-circuit, over-current and over-voltage protection. • The power board has reset function. • The power board can manage the charging process of li-ion battery (11.1V/4.4AH). The charging time is 6.5 hours maximum. 5VDC-DC BUCK converter AC input

Voltage test

AC/DC REC POWER SOURCE

Li-ion Battery and Charging Managerent circuit

Power on/off control circuit

12V output

FIGURE 1-4 Block diagram of Trio power supply board Key Test Points

Trio™ Service Manual

NO.

NAME

LOCATION

FUNCTION

1

Oscillator frequency

Pin 4 of U1

Generate a oscillating frequency about 100kHZ

2

GND

CC61 negative electrode

Primary Ground

3

D-S waveform

Q1.2

There is a waveform of about 100KHZ,107~354V between Q1.2 and the negative electrode of C12

4

Driving waveform

Q1.1

There is a driving waveform of about 100KHZ, 15V between Q1.1 and the negative electrode of C12

5

Rectified waveform

D5 anode

Secondary rectified voltage

6

VIN

C18 positive electrode

17.6V,provide input voltage for DC-DC

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Hardware Overview

Theory of Operation

Key Test Points

1.2.3

NO.

NAME

LOCATION

FUNCTION

7

12V

C41 positive electrode

12V output, voltage range is 11.0~13.0V

8

5V

C58 positive electrode

5V output, voltage range is 4.75~5.25V

9

Feedback voltage

R37 positive electrode

There is a DC waveform of about 2.5V between R37

CPU Board (Main Control Board) P/N 0671-00-0056 or P/N 0671-00-0236

1.2.3.1

Overview Power Supply Input Voltage: +12 V±5%; +5 V±5% The main control board uses the Coldfire series embedded microprocessor 5206e manufactured by Motorola Company. It also adopts 3.3 V low-voltage power supply to reduce the power consumption. Other main components on the main control board include: Flash, SRAM, FPGA, network controller, etc., all of which require 3.3 V power. The capacity of the Flash is 2 MB or 4 MB*, which employs two parallel-connected 512K x 16 or 1M x 16* chips and therefore uses 32-bit character width to support CPU to operate at the highest possible speed instead of accessing the DRAM for operation. The main control board has also a 4 MB memory, which is made up of two parallel-connected 1M ×16-bit chips. Because no executing program is required to be loaded, only one RTC is used. This chip uses one 225maH dry cell as the spare power supply. In addition, one 2KB E2PROM is used to store parameters. The main control board supports a resolution of 800 x 600 and provides three interfaces: a LVDS interface, a 6 bit digital interface, and a VGA interface. The monitor displays characters and waveforms, in the same color, on the screen. The support system needs 10 serial ports, and the baud rate (4800/9600/19.2 K/38.4 K/76.8 K) can be selected by software and interface buffer drives. The main control board adopts the network controller AX88796 (3.3 V, 10 MHz), which has inside 16 K high-speed buffer SRAM. The MAX5102 8-bit single-way D/A converter is used to fulfill analog output. The 5 V and 12 V regulated voltage supplies are introduced from the power board, and therefore 3.3 V and 2.5 V working supplies are respectively generated. Among them, 2.5 V is to be used for the internal verification of FPGA. *Applies to P/N 0671-00-0056.

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Theory of Operation

Hardware Overview

2

RTC/E PROM

DRAM

Flash/SRAM

Display driving circuit

CPU

Network controller

Interrupt management circuit

I/O serial interface

Audio alarm/spare battery

FPGA

FIGURE 1-5 Block Diagram of Trio CPU board

1.2.3.2

Detailed Description 3.3 V low-voltage power supply component is used. The external power is 5 V, which is converted by the DC/DC converter into 3.3 V and 2.5 V, the latter voltage being especially used for FPGA. The main control board is connected to external devices via corresponding interfaces and input: the power supply connected to the interface board, the 9-way serial port, TFT interface, analog VGA interface, network interface, analog output and a spare serial port, etc. The BDM interface, on the board, is reserved for the purpose of software testing and downloads.

CPU Uses Coldfire 5206e. Clock rate is 54 MHz, working voltage is 3.3 V.

FLASH Uses two parallel-connected 512K x 16 or 1M x 16* FLASH memories. The output terminal PP1 of CPU is used to realize write-protection of FLASH. It is effective in low-level state. *Applies to P/N 0671-00-0056.

DRAM The Trio CPU main control board uses two parallel-connected 1M x 16 DRAM, which construct 4M address space.

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Hardware Overview

Theory of Operation

Display The resolution is 800 x 600. Frequency is 38 MHz. It works in an appropriate SVGA mode. VRAM adopts 16-bit structure and is divided into an alphanumeric character screen and a waveform screen. To the left of the alphanumeric character screen is the corresponding waveform screen. The character screen is used to display data and flashing alarming parameters. The user can select the color of the waveform and alphanumeric characters for each parameter.

LVDS Interface By utilizing time-share sampling, the LVDS (Low Voltage Differential Signaling) interface converts multi-channel CMOS/TTL signals into single channel, low-voltage, double-frequency differential signals. LVDS interface is generally realized by a special integrated circuit. The special LVDS chip used for display is DS90CF363A. This chip converts 18-bits of RGB data and 3 bits of LCD timing and control data (21 bits of CMOS/TTL data) into 3 LVDS data streams. Four differential signals including the 3 data streams and a phase-locked frequency are transmitted to the display screen. The working frequency of DS90CF363A is 20~65 MHz.

Reset and Parameter Storage The CPU board uses an integrated chip CAT1161, which controls both power-on reset and parameter storage. This chip has an E2PROM with the capacity of 2K. It can be used to modify and store various nonvolatile parameters of the host. The power-on reset and WATCHDOG functions are used to realize reset function of the CPU board. When J1 is open circuit, the software can also disable WATCHDOG by using the output signal PP0 of CPU in order to realize the self test of WATCHDOG. The bus interface of this chip is I2C.

Network Controller The network controller adopts special chip AX88796. Its working clock is 25 MHz. It also has internal 16 K high-speed buffer SRAM. The data bus of this chip is 16-bit width. Key Test Points

1-8

NO.

NAME

FUNCTION

1

V33

Digital supply voltage: +3.3 V

2

V25

FPGA supply voltage: +2.5 V

3

V3

Lithium battery voltage: +3 V

4

CLK

CPU master clock: 54 MHz

5

PCK

FPGA and display clock: 38 MHz

6

NCK

Network chip clock: 25 MHz

7

/RST

System reset signal

8

/NINT

Network chip interrupt signal

9

DO

Signal indicating successful FPGA configuration

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Trio™ Service Manual

Theory of Operation

1.2.4

Hardware Overview

Keypad Board P/N 0671-00-0237

CPU (AT89C2051) Watchdog

RAM 128 x 8

BUTTON

button and encoder scan circuit

button signal input

FLASH 4KX8

serial communication

Main control board

Alarm indicator control circuit

ENCODER

Sound Effect Control

Volume Control

Lowpass and Bandpass Filter

Power Amplifier LM386

speaker

FIGURE 1-6 Keypad Block Diagram

1.2.4.1

Detailed Description This circuit has three main parts: 1.

Alarm Audio Signal Circuit: The alarm audio signal circuit is made up of components including U3, U6, R8, R25, E6 (E1), R11, R12, R3 and R32. P3.3 is used to control the length of the alarm sound. R8, E1 and E6 are used to generate the rise edge and the fall edge of the sound signal. Q1 is used to make the rise edge and fall edge of the lowlevel alarm slower than those of medium/high-level alarm. D1 is used to generate the heart beat and pulse tone. If P3.2 is high, the alarm square waveform of P3.5 will pass and, as a result, control P3.2 to generate a "heart beat tone" or ‘‘rotary encoder tone’’. R11, R12, R3, R32 and R18 together construct a variable voltage-dividing network which, by controlling the state of RA and RB via U3, determines the sound volume level.

2. RC Bandpass Filter/Audio Amplifier: A one-stage RC bandpass filter is used to block the low frequency component of the alarm signal (700 Hz. square wave) before it is input to the audio amplifier, LM386. This bandpass filter is made up of R13, R28, C9, C15, RA and the input resistance R in of LM386. 3. Alarm Indicator Control/Encoder and Key Scanning: The flashing of the alarm indicator in red or green is controlled by the state of microchip P1.6 and P1.7. The microprocessor scans the state of microchips P1.0~P1.2 to determine which key, or if the encoder, is pressed. The microprocessor scans the state of microchips P1.4 and P1.5 to determine if the encoder is turned and in which direction it is turned. Key Test Points

Trio™ Service Manual

NO.

NAME

LOCATION

FUNCTION

1

VCC

P4.4

Power input, range: 4.8~5.1V

2

GND

P4.5

Power supply and signal ground

3

RST

U1.1

CPU reset signal. At low level (<0.3V) when operating normally

4

Crystal oscillator

X1.1, X.2

CPU crystal oscillator. Sine wave (1.5~3.5V) when operating normally

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Hardware Overview

1.2.5

Theory of Operation

Keypad Board P/N 0671-00-0058 LED

KEY

CPU (AT89C51)

SPEAKER

ENCODER Audio Process Circuit

RAM 128 X 8

FLASH 4K X 8 Watchdog

Main Control board (Host CPU Board)

FIGURE 1-7 Keypad block diagram

1.2.5.1

Detailed Description This module detects key and encoder input signals, converts them into code then sends these coded signals to the main board. The main control board (Host CPU board) in turn sends commands back to the keyboard's control indicator and audio process circuits, which enable or disable audio and visual alarm respectively, as required.

CPU • Detects key and encoder input signals; • Controls LED status; • Controls Audio Process Circuit; • Regularly zeroes Watchdog Timer; • Communicates with main board.

Audio Process Circuit Generates audio signals to drive the speaker.

Watchdog • Upon power-up, supplies Reset signal to CPU; • Provide functions of Watchdog Timer Output and voltage detection.

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Theory of Operation

Hardware Overview

Key Test Points

1.2.6

NO.

NAME

LOCATION

FUNCTION

1

VCC

P4.4

Power input, range: 4.8~5.2V

2

GND

P4.5

Power supply and signal ground

3

RST

U1.10

CPU reset signal. At low level(<0.3V) when operating normally

4

Crystal oscillator

X1.1,X.2

CPU crystal oscillator. Sine wave signal (1.5~3.5V) when operating normally

Keypad Board P/N 0671-00-0064 LED

KEY

CPU (PIC16F73)

SPEAKER

ENCODER Audio Process Circuit

RAM 192 X 8

FLASH 4K X 4 Watchdog

Main Control board (Host CPU Board)

FIGURE 1-8 Keypad block diagram

1.2.6.1

Detailed Description This module detects keypad and encoder input signals, converts them into code and transmits the code to the Host CPU board. The Host CPU board sends commands to the keyboard which in turn controls the indicator and audio process circuits, activating audio and visual alarms accordingly.

CPU The Keypad Board's CPU is responsible for the following functions: • Detects keypad and encoder input signals • Controls LED status • Controls Audio Process Circuit • Regularly zeroes Watchdog Timer • Communicates with main board.

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Hardware Overview

Theory of Operation

Audio Process Circuit Generates audio signals to drive the speaker.

Watchdog • Upon power-up, supply Reset signal to CPU • Provide functions of Watchdog Timer Output and voltage detection. Key test points

1.2.7

NO.

NAME

LOCATION

FUNCTION

1.

5V/5B

J5 pin 1

Power input, range: 4.0~5.5V

2.

GND

J5 pin 2

Power supply and signal ground

3.

RST

J5 pin 3

CPU reset signal. At low level(<0.8V (during normal operation)

4.

Crystal oscillator

X1 pin 1,X1 pin 2

CPU crystal oscillator. Sine wave signal 1.5~3.5V (during normal operation)

TR60-C Recorder Thermal Head

Motor driver

cpld 9536

Status Detection

DC/DC 12 V > 8 V

CPU

Signal & 5 V

FIGURE 1-9 Block Diagram of TR60-C drive board

1.2.7.1

Detailed Description Thermal Head The thermal head, the core component in the TR60-C recorder, is the PTMBL1300A thermal head, manufactured by the ALPS company.

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Theory of Operation

Hardware Overview

CPU System The CPU system is the core of the drive board. Its task is to receive the data from the host and generate lattice messages after calculation using a specified algorithm. These messages are then sent to the thermal head for printing. The CPU system can simultaneously collect data from both the thermal head and the drive board and display data sent to the host.

Power Conversion The recorder requires the system to provide two voltages: 12 V and 5 V. The 5 V is directly driven by the logic and analog circuit of the drive board and the thermal head. Its current is less than 150 mA. The 12 V is converted into 8 V (by the DC/DC on the board) to drive the thermal head and the motor. The current required is determined by the printing content and ranges from 0.5 A to 2 A.

Motor Drive A small motor is used to control the paper movement at the thermal head. The processor on the drive board uses two motor drives IC LB1843 V to control and drive the motor. These two IC’s use constant current to control and drive the motor.

Status Detection To correctly and safely control and drive the thermal head and the motor, the drive board must use the sensor inside the thermal head to detect the following signals: the position of the chart paper, if the chart paper is installed and if the temperature of the thermal head has exceeded the limit. Key Test Points

Trio™ Service Manual

NO.

NAME

LOCATION

FUNCTION

1

12 V

JP3.1

Power input, range: 10~18 V

2

GND

JP3.2

Power and signal ground

3

VPP

U7.8

Power supply for heating thermal head and drive motor: 7.8 V~8.4 V

4

VCC

U1.14

+5 V supply: 4.75~5.25 V

5

RESET

U3.10

CPU reset signal. At high level(>2.4 V) after power-on

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Serial Interface Converter Board

1.3

Theory of Operation

Serial Interface Converter Board The Serial Interface Converter Board is used to convert the TTL level (5V) to RS232 level.

P5

P1

J2

Serial Coverter P.C.B J1

P4(TFT_DIGTAL ) P10

P2(CRT) P3(FOR 9000 VGA) P12 P11

Serial interface

Host P .C .B.

P7(BDM ) P13

P17(FOR 509C) P15 P16 P6

P9

P14

P8

FIGURE 1-10 Serial Interface connection diagram

TTL Level Tx Rx G 5V

RS232 Level Converter Board

Tx

RS232 Converter chip

Rx G DB9 Socket

FIGURE 1-11 Block diagram of Serial Interface Converter Board

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Theory of Operation

Parameter Circuit Descriptions

1.4

Parameter Circuit Descriptions

1.4.1

ECG The main functions concerning ECG are: • Lead: 3-lead, 5-lead • Lead Method; I, II, III, avR, avL, avF, V, CAL • Floating Input • Right-Leg Drive • Lead-off Detection The ECG circuit is responsible for processing the ECG signals of human body. The circuit consists of following parts: Input Circuit: The ECG electrodes are connected into the circuit through the cable. This circuit is mainly used to protect ECG input stage and filter the signals so as to remove the outside interference. Buffer Amplifying Circuit: Used to convert the impedance of ECG signals, so as to ensure that the ECG has a very high input impedance but only low output impedance. Right-Leg Drive Circuit: The middle output point of the buffer amplifying circuit is reversely amplified and then fed to the RL of the 5-lead ECG to maintain the human body in a equipotential state. This method can reduce the interference and raise the commonmode rejection ratio of the circuit. Lead-off Detection: Based on the theory that the lead-off may cause the output of the buffer amplifying circuit to change, we can use the comparator to accurately determine if the lead has fallen off. In this way, the level can also be converted into TTL level for the MPU to test. Main Amplifying Circuit: A measurement amplifier consisting of three standard operation amplifiers. Last Stage Processing Circuit: Used mainly to couple ECG signals, program control of the gain amplifier, filter the waveform and move the level, amplify the signal and send it to the analog-to-digital converter.

1.4.2

Respiration Respiration is measured by the thoracic impedance method. When a person is breathing, his chest moves up and down. This movement equals the impedance change between electrodes RA and LL. The monitor converts the high-frequency signals passing through RA and LL into amplitude-modulated high-frequency signals, which are then demodulated and amplified into electronic signals varying with the respiration changes and then transmitted to analog-digital converter. The RESP module is made up of a respiration circuit board and a coupling transformer. The circuit includes stages such as: oscillation, coupling, demodulation, preliminary amplification and high-gain amplification.

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